1. Field of the Invention
The present invention relates to an interface for USB (Universal Serial Bus) devices. More particularly, the present invention relates to a data receiving apparatus that receives serial data of a first signal line and a second signal line.
2. Description of the Related Art
USB is drawing attention as an interface standard for connecting a personal computer and peripheral devices. The USB is a method for transmitting serial data using two signal lines. In the case of receiving a USB signal, in a receiving circuit, two signal lines are connected to a positive input terminal and a negative input terminal of a receiving comparator, and the receiving comparator outputs two differential signals. When the two signal lines are both low level, they become an EOP (End-of-Packet) period of several bits which indicates the end of a packet in particular, and since the noise of each signal line and the minimal difference in the potentials of the two signals is applied to the receiving comparator, there are cases where the output of the receiving comparator is not reliable. Accordingly, when the receiving comparator inputs are out-of-phase, a usual differential output is carried out, and when it is EOP at which both signal lines are low level, a special correction circuit is required to stabilize the output of the receiving comparator. In patent document 1 (Japanese Patent Application Laid-Open No. 2001-148719), a data receiving apparatus is disclosed which has a correction circuit for stabilizing the output of the receiving comparator.
FIG. 1 shows a circuit diagram of a conventional data receiving apparatus in which, in the case of EOP, the output of the receiving comparator is forcibly stabilized.
In FIG. 1, 1 denotes a USB connector, 2 denotes data receiving apparatus 2 to be connected to USB connector 1, and USB connector 1 is provided with first and second signal lines 3a and 3b for serial transmission of data and first and second power lines 4a and 4b for power supply. Data receiving apparatus 2 is a USB transceiver and is comprised of receiving comparator 5, noise canceling circuits 6 and 7 comprised of a Schmitt trigger circuit, NOR circuit 8 and OR circuit 9. At an implementation level, data receiving apparatus 2 corresponds to a PHY (physical layer) of a USB interface circuit, and an output signal and a connection detection signal are transmitted to subsequent electronic device 11.
A positive input terminal of receiving comparator 5 is connected to first signal line 3a, and a negative input terminal of the receiving comparator 5 is connected to second signal line 3b. Also, noise canceling circuit 6 and noise canceling circuit 7 are connected to first signal line 3a and second signal line 3b, and the outputs of noise canceling circuit 6 and noise canceling circuit 7 become the input of NOR circuit 8, and output RCV of receiving comparator 5 and the output of NOR circuit 8 are inputted to OR circuit 9. Output 10 of OR circuit 9 becomes the output.
A description will be given of the operation of data receiving apparatus 2 having the above configuration.
FIG. 2 and FIG. 3 are operation waveform diagrams showing a voltage condition of the above data receiving apparatus 2.
In FIG. 2, times t1˜t4 show packet transmission, out-of-phase signals are inputted at 3a and 3b, and output RCV of receiving comparator 5 outputs a differential signal thereof. The RCV is inputted to OR circuit 9, and since the output of NOR circuit 8 is low level, it is outputted as output 10 which is in-phase with the RCV, and ends with output 10 being high level in times t3˜t4. Times t4˜t6 show an EOP state, and first signal line 3a and second signal line 3b both become low level. For this reason, output RCV of receiving comparator 5 becomes unreliable due to the influence of noise and the minimal difference in potential between 3a and 3b, and this condition is shown by the hatched portion in FIG. 2. Also, since outputs VP and VM of noise canceling circuit 6 and noise canceling circuit 7 are low level and the output of NOR circuit 8 becomes high level, output 10 of OR circuit 9 is fixed at a high level, irrespective of the condition of the RCV signal.
As described above, at the time of packet transmission, a differential signal is obtained, as RCV output, from output 10 of OR circuit 9, and since immediately before changing to EOP state, output 10 of OR circuit 9 ends at high level, and, after changing to EOP, output 10 of OR circuit 9 is fixed to a high level, irrespective of the RCV, it can change from packet transmission end time to EOP state, while being at a high level.
However, such a conventional data receiving apparatus presents a problem that USB communications during the EOP period and the preceding period are not reliable.
For instance, in the packet transmission immediately prior to changing to EOP state, if transmission ends with first signal line 3a at low level and second signal line 3b at high level, and since output 10 of OR circuit 9 becomes low level immediately prior to changing to EOP state, output 10 of OR circuit 9, at the time of changing from packet transmission to EOP state, changes from a low level to a high level.
FIG. 3 is an operation waveform diagram showing a change of the voltage condition of the above problem in detail. Similar to FIG. 2, periods t1˜t3 show packet transmission, out-of-phase signals are inputted at 3a and 3b and output RCV of receiving comparator 5 outputs a differential signal thereof. However, in the period of t2˜t3 which is the final period of the packet transmission, since first signal line 3a is low level and second signal line 3b is high level, output 10 of receiving comparator 5 becomes low level. Times t3˜t5 show an EOP state at which first signal line 3a and second signal line 3b are both low level, and the output RCV of receiving comparator 5 becomes unreliable due to the influence of noise and the minimal difference in the potentials of 3a and 3b, this condition being illustrated by the hatched portion in FIG. 3. Also, since outputs VP and VM of noise canceling circuit 6 and noise canceling circuit 7 are both low level and the output of NOR circuit 8 is high level, output 10 of OR circuit 9 is fixed to a high level, irrespective of the condition of the RCV signal.
As described above, since output 10 of OR circuit 9 becomes low level in the final period t2˜t3 of the packet transmission, output 10 of OR circuit 9 changes to high level in the EOP period t3˜t5, a problem occurs that USB communications during the EOP period and the preceding period are not reliable.